The inventive concept relates to a method of laying out a semiconductor device, and more particularly, to a method of arranging a semiconductor device considering a switching activity of a signal with respect to the semiconductor device.
A semiconductor device may include various logical devices such as an AND gate, a NAND gate, an OR gate, or a NOR gate and various type of flip-flops. The flip-flop receives a clock and an input signal to generate an output signal.
Since a clock is continuously toggled on a reference cycle, power consumption by toggling of the clock is large. Thus, by moving the flip-flop close to a clock gating cell which outputs the clock, the power consumption by the clock may be reduced. However, this may cause an increase of a distance between the flip-flop and a device which receives an output signal from the flip-flop. That is, power consumption by toggling of the output signal of the flip-flop may increase.
Therefore, it is desirable to arrange elements constituting a semiconductor device in consideration of various factors capable of reducing not only toggling of the clock but also the power consumption of the semiconductor device.